As defined in the FY 1997 Blue Book:
"HECC R&D is focused on continued U.S. leadership in high
performance computing and computation. Investments concentrate on
leading-edge innovations in hardware and software such as storage and
data technologies for high-end computing systems, experimentation with
novel devices, development of system software technologies, advanced
simulation techniques, and fast, efficient algorithms for simulation and
modeling. In addition, HECC research supports exploration of advanced
computing concepts in quantum, biological, and optical computing at both
the hardware and software levels. At the high end, these technologies
enable distributed, multidisciplinary computation-intensive, scientific
and engineering applications. Scalable systems allow effective
deployment of these technologies to the workplace, school, and
home."
HECC R&D investments are made in four key science and technologies areas: hardware, software, systems architecture, and applications R&D. Hardware R&D includes low latency, high bandwidth memory technologies, innovative mass storage concepts, and fast, efficient logic devices employing new superconducting, optical, biological and semiconducting materials technology. Software R&D includes innovative compilers, debuggers, and fast, efficient algorithms for simulation and modeling. Systems architecture R&D is focused on scalable and distributed operating systems. The applications area R&D includes support for centers for supercomputing and advanced experimental computing systems architectures. R&D investments in all four areas are necessary to enable development of the distributed, multidisciplinary computation-intensive applications mandated by future national and international scientific, military, and commercial markets.
Many of the HPCC agencies support scientific mission-driven applications called "Grand Challenge" projects. These projects span the spectrum of scientific problems from cosmology to quantum chromodynamics, to applications in global climate modeling and protein folding. These projects involve available high end computing systems, such as parallel vector processors (PVPs), symmetric multiprocessors (SMPs), and massively parallel processors (MPPs). Grand Challenge projects depend on high performance compatible hardware and software, such as memories, processors, mass storage, operating systems, program development and data management tools, and network protocols.
Scalability is a very important consideration in HECC R&D. How well a mid-range computing system scales to a high end computing system is of paramount interest. The challenge is to find a scaling process, such that market-driven mid-range computing systems will scale in performance to the higher end systems in a cost-effective way. The same mid-range program development and management models must be viable for the large end systems necessary to meet the computational requirements of advanced problems associated with the Grand Challenge projects. For clusters of SMPs to be effective in high end computing, the technologies and parameters associated with software, storage, computing, and networking must scale in a fashion that minimizes costs and maximizes computing power.
Very large scale parallel computing will eventually garner wide scale acceptance outside the scientific and engineering communities by successfully addressing the following challenges:
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Developers of software tools and programming environments must keep pace
with developers of advanced computational hardware
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An acceptable unified reference model for programming large-scale
applications such as the Grand and post-Grand Challenge projects must be
developed
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Data management tools for large, diverse data sets must be developed |
The consolidation and focus of research on the shared-memory programming model, as commercially delivered in medium scale (fewer than 100 processors) SMPs, is one evolutionary method that addresses the first challenge. Research should be focused on developing new hardware to overcome latency and transportable software technologies that cost-effectively scale the SMP model to significantly larger numbers of processors across diverse hardware architectures. The primary benefit will be to stabilize the underlying programming model for the development of software tools and applications, enabling the software-developer community to more easily support high performance systems.
An important requirement for addressing the second challenge is a unified programming model that can be adopted consistently across a wide range of architectures. The diversity of parallel architectures and associated programming models has expanded our understanding of scalable computing, indicating the need for the generation of portable software development tools, execution environments, and scalable applications.
Large scale data management presents a third primary challenge to technological advancement in high performance parallel computing; the development of the storage hierarchy hardware technology, from petabyte tape robots to large, fast on-chip memories. Effective data management demands systems engineering and integration of components supplied by many vendors. Existing hardware components must be integrated into very large data-intensive systems. Experience has shown that data management testbeds must be tested at full scale.
The Supercomputer centers and High Performance Computation Research centers provide some of the largest systems of scalable SMPs available today for addressing large-scale applications. Researchers using these systems are currently faced with the lack of versatile, portable programming environment tools needed to implement their applications. Support for operating systems software and program development environments is an important thrust of the HECC R&D activity.
High end computing also requires R&D focused on logic devices that will have delay-power products orders of magnitude less than the delay-power products of current commercial devices. This can be accomplished by a revolutionary redesign of the logic circuits and migration to a new materials technology. Some promising concepts in the research stage include logic circuits based on semiconducting materials such as the III-V binary alloys. R&D must be conducted on other novel materials, such as low and high temperature superconductors used for logic circuits and memories. Other promising concepts are on- and off-chip interconnections based on guided optics that employ wave division multiplexing, massive holographic optical memory devices, and other mass storage concepts. Basic research must be done on innovative logic devices based on nanotechnology and biological materials that may exploit the information contained in large molecules such as deoxyribonucleic acid (DNA).
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